37 lines
1.1 KiB
ArmAsm
37 lines
1.1 KiB
ArmAsm
// Copyright (c) 2015 Klaus Post, released under MIT License. See LICENSE file.
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//+build arm64,!gccgo,!noasm,!appengine
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// See https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt
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// func getMidr
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TEXT ·getMidr(SB), 7, $0
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WORD $0xd5380000 // mrs x0, midr_el1 /* Main ID Register */
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MOVD R0, midr+0(FP)
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RET
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// func getProcFeatures
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TEXT ·getProcFeatures(SB), 7, $0
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WORD $0xd5380400 // mrs x0, id_aa64pfr0_el1 /* Processor Feature Register 0 */
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MOVD R0, procFeatures+0(FP)
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RET
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// func getInstAttributes
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TEXT ·getInstAttributes(SB), 7, $0
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WORD $0xd5380600 // mrs x0, id_aa64isar0_el1 /* Instruction Set Attribute Register 0 */
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WORD $0xd5380621 // mrs x1, id_aa64isar1_el1 /* Instruction Set Attribute Register 1 */
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MOVD R0, instAttrReg0+0(FP)
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MOVD R1, instAttrReg1+8(FP)
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RET
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TEXT ·getVectorLength(SB), 7, $0
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WORD $0xd2800002 // mov x2, #0
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WORD $0x04225022 // addvl x2, x2, #1
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WORD $0xd37df042 // lsl x2, x2, #3
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WORD $0xd2800003 // mov x3, #0
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WORD $0x04635023 // addpl x3, x3, #1
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WORD $0xd37df063 // lsl x3, x3, #3
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MOVD R2, vl+0(FP)
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MOVD R3, pl+8(FP)
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RET
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